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300mA HIGH SPEED, EXTREMELY LOW NOISE CMOS LDO REGULATOR AP2125

Data Sheet

BCD Semiconductor Manufacturing LimitedSep. 2012 Rev. 1. 5

Figure 34. PSRR

Typical Performance Characteristics (Continued)

10 100 1k 10k 100k

100

PSRR (dB)

Frequency (Hz)

AP2125-1.8

=2.8V

OUT

=30mA

10 100 1k 10k 100k

100

PSRR (dB)

Frequency (Hz)

AP2125-3.3

=4.3V

OUT

=30mA

Figure 35. PSRR

Figure 32. Enable Input Response and Auto-discharge

(Conditions: V

=0 to 3V, C

=1μF,

OUT

=1μF, V

=3V, no load)

(1V/Div)

OUT

(1V/Div)

Time (200μs/Div)

AP2125-2.8

Figure 33. ESR vs. Output Current

0 50 100 150 200 250 300

0.1

100

1000

Stable Area

AP2125-1.8

= 1μF

OUT

= 1μF

ESR (Ω)

Output Current (mA)

1 2 ... 15 16 17 18 19 20 21 22 23 24 25 26 27

Data Sheet 1
General Description 1
Features 1
Applications 1
Pin Configuration 2
Pin Description 2
Functional Block Diagram 3
Ordering Information 4
Electrical Characteristics 6
Data Sheet 11
Figure 10. Current Limit 14
Figure 11. Current Limit 14
Typical Application 22
Mechanical Dimensions 23
SOT-23-3 Unit: mm(inch) 23
SOT-23-5 Unit: mm(inch) 24
SC-70-5 Unit: mm(inch) 25
SC-82 Unit: mm(inch) 26

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